EP2A25F672ES vs EP2A25F672I-9 比較
詳細な並列比較: EP2A25F672ES メーカー: Altera および EP2A25F672I-9 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A25F672ES | EP2A25F672I-9 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $198.00 | $195.00 |
| Family | APEX II | APEX II |
| Logic Elements | 24,320 | — |
| Maximum Gates | 900,000 | — |
| Embedded System Blocks (ESBs) | 24 | — |
| Maximum Embedded RAM | 1.4 Mbit | — |
| Maximum User I/O Pins | 492 | [DATA_NEEDED: maximum user I/O pins] |
| パッケージ | 672-ball FC-FBGA | 672-pin FCBGA (FineLine BGA) |
| Process Technology | 0.15 µm CMOS | 0.18 µm CMOS |
| Core Voltage | 1.5 V | 1.5 V / 1.8 V (speed-grade dependent) |
| Maximum System Clock Frequency | 500 MHz | — |
| Number of PLLs | 4 | 4 |
| I/O Banks | 16 | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | LVTTL, LVCMOS, LVDS, PCI |
| Configuration Mode | Serial / Parallel / JTAG | — |
| 動作温度範囲 | [DATA_NEEDED: operating temperature range] | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS status] |
| Logic Elements (typical) | — | 25,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESB) Memory | — | 1,125 Kbits |
| Operating Temperature Grade | — | Industrial (-40 °C to +100 °C junction) |
| Speed Grade | — | -9 |
| 実装タイプ | — | Surface Mount (BGA) |
| 湿気感度レベル（MSL） | — | 3 (per Vyrian listing) |
| Peak Reflow Temperature | — | 220 °C (per Vyrian listing) |
| Configuration Method | — | JTAG / serial configuration EPROM |
| Legacy Status | — | Obsolete - consult Altera / Intel FPGA archive for documentation |