EP2A40B652C7 vs EP2A40F780 Vergleich
Detaillierter Direktvergleich von EP2A40B652C7 von Intel und EP2A40F780 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2A40B652C7 - Altera APEX II 40k LE FPGA, BGA-652 | Intel PSG
EP2A40B652C7 ⚠ Letzte BestellmöglichkeitAltera
EP2A40F780 - APEX II 1.5M Gate FPGA 780-pin FBGA | Intel
EP2A40F780 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2A40B652C7 | EP2A40F780 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $142,00 |
| Device Family | APEX II | — |
| Logic Elements | 40,000 LEs | 30,000 |
| Maximum User I/O Pins | 538 (per package, [DATA_NEEDED: exact count for BGA-652]) | [DATA_NEEDED: maximum user I/O count] |
| Gehäuse | 652-ball FineLine BGA | 780-ball FineLine BGA (FBGA) |
| Embedded Memory | [DATA_NEEDED: ESB RAM bits for EP2A40] | — |
| Number of PLLs | [DATA_NEEDED: PLL count for EP2A40] | — |
| Operating Temperature Grade | Commercial (C suffix) | — |
| Speed Grade | 7 | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS, LVPECL | — |
| Supply Voltage (Core) | 1.8 V nominal [DATA_NEEDED: exact tolerance] | — |
| Supply Voltage (I/O) | Multi-voltage I/O [DATA_NEEDED: VCCIO range] | — |
| Process Technology | [DATA_NEEDED: process node] | [DATA_NEEDED: process node] |
| Configuration Method | SRAM-based, supported via EPC configuration devices | — |
| RoHS-Status | Unknown | [DATA_NEEDED: RoHS status] |
| Montageart | Surface Mount (BGA) | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Family | — | APEX II |
| Device | — | EP2A40 |
| Typical Gates | — | 1,500,000 |
| Betriebstemperatur | — | [DATA_NEEDED: temperature grade] |
| Configuration Memory | — | SRAM-based |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming File Format | — | .sof/.pof via Quartus II |
| Core Voltage | — | [DATA_NEEDED: VCCINT] |
| I/O Voltage | — | [DATA_NEEDED: VCCIO range] |