EP2A40B724C8ES vs EP2A40B724C7 Vergleich
Detaillierter Direktvergleich von EP2A40B724C8ES von Intel und EP2A40B724C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40B724C8ES | EP2A40B724C7 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $162,00 | $650,00 |
| Series | APEX II (EP2A) | — |
| Family | Field Programmable Gate Array (FPGA) | APEX II |
| Logic Elements / Cells | 38,400 | 38,400 |
| Number of Gates (typical) | 655,360 | — |
| Number of I/O | 540 | — |
| Gehäuse | 724-BBGA / FCBGA | 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm |
| Speed Grade | -8 (C8) | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C (commercial) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| MSL-Level | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Non-compliant (lead-bearing FCBGA) |
| Versorgungsspannung | [DATA_NEEDED: VCCINT / VCCIO core and I/O voltages] | — |
| Process Node | [DATA_NEEDED: CMOS process technology] | — |
| Embedded Memory | Embedded System Blocks (ESB) | — |
| Programmable Logic Type | SRAM-based, in-system reconfigurable | — |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Architecture | MultiCore interconnect with LABs and ESBs | — |
| Total System Gates | — | 1,500,000 |
| Embedded RAM Bits | — | 655,360 |
| Maximum User I/O | — | 540 |
| Core Supply Voltage | — | 1.425 V to 1.575 V (typ. 1.5 V) |
| Process Technology | — | 0.15 µm CMOS, up to 8 metal layers, all-layer copper |
| Maximum Internal Frequency | — | 562 MHz |
| PLLs | — | 4 |
| I/O Standards Supported | — | LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps) |
| Configuration Method | — | JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices |
| MultiVolt I/O Support | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| DDR Memory Support | — | Yes (via ESB / I/O circuitry) |