EP2A40F1020C8 vs EP2A70F1020C9 Vergleich

Detaillierter Direktvergleich von EP2A40F1020C8 von Intel und EP2A70F1020C9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A40F1020C8 EP2A70F1020C9
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $310,00 $132,80
Family APEX II APEX II (APII)
Logic Family CMOS —
Process Technology 0.15 µm all-layer copper, up to 8 metal layers —
System Gates 1,500,000 —
Logic Cells 38,400 —
Macros / Macro Cells 2,560 —
Embedded RAM [DATA_NEEDED: total ESB bits] —
Maximum Internal Frequency 376 MHz —
Propagation Delay 1.55 ns —
User I/O Pins 735 735
Core Voltage (VCCINT) 1.5 V [DATA_NEEDED: VCCINT nominal value]
I/O Voltage (VCCIO) MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V [DATA_NEEDED: VCCIO nominal value]
Package Type FC-FBGA (FineLine BGA) —
Package Pin Count 1020 —
Package Dimensions 33 x 33 mm —
Ball Pitch 1.0 mm —
Betriebstemperatur 0 C to +85 C (commercial, 'C' suffix) —
RoHS-Status [DATA_NEEDED: confirm per lot] [DATA_NEEDED: RoHS compliance status]
Configuration Interface JTAG / Altera serial —
Design Toolchain Quartus II (legacy version 4.x or earlier recommended) —
Manufacturer — Intel (formerly Altera)
Typical Gates — ~70,000 gates
Gehäuse — 1020-ball FBGA (FineLine BGA)
Speed Grade — -9 (fastest)
Operating Temperature Grade — Commercial (C)
Configuration Method — JTAG / passive serial / passive parallel
On-chip Memory — EABs (Embedded Array Blocks)
Embedded Multipliers — Yes (DSP blocks in LABs)
Montageart — Surface Mount
MSL-Level — 3 (JEDEC J-STD-020)

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