EP2A40F1020C8 vs EP2A70F1020C9 Comparaison
Comparaison détaillée côte à côte de EP2A40F1020C8 par Intel et EP2A70F1020C9 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F1020C8 | EP2A70F1020C9 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $310,00 | $132,80 |
| Family | APEX II | APEX II (APII) |
| Logic Family | CMOS | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | — |
| System Gates | 1,500,000 | — |
| Logic Cells | 38,400 | — |
| Macros / Macro Cells | 2,560 | — |
| Embedded RAM | [DATA_NEEDED: total ESB bits] | — |
| Maximum Internal Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| User I/O Pins | 735 | 735 |
| Core Voltage (VCCINT) | 1.5 V | [DATA_NEEDED: VCCINT nominal value] |
| I/O Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | [DATA_NEEDED: VCCIO nominal value] |
| Package Type | FC-FBGA (FineLine BGA) | — |
| Package Pin Count | 1020 | — |
| Package Dimensions | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| Température de fonctionnement | 0 C to +85 C (commercial, 'C' suffix) | — |
| Statut RoHS | [DATA_NEEDED: confirm per lot] | [DATA_NEEDED: RoHS compliance status] |
| Configuration Interface | JTAG / Altera serial | — |
| Design Toolchain | Quartus II (legacy version 4.x or earlier recommended) | — |
| Manufacturer | — | Intel (formerly Altera) |
| Typical Gates | — | ~70,000 gates |
| Boîtier | — | 1020-ball FBGA (FineLine BGA) |
| Speed Grade | — | -9 (fastest) |
| Operating Temperature Grade | — | Commercial (C) |
| Configuration Method | — | JTAG / passive serial / passive parallel |
| On-chip Memory | — | EABs (Embedded Array Blocks) |
| Embedded Multipliers | — | Yes (DSP blocks in LABs) |
| Type de montage | — | Surface Mount |
| Niveau MSL | — | 3 (JEDEC J-STD-020) |