EP2A40F1020C9ES vs EP2A40F1020C8N Vergleich
Detaillierter Direktvergleich von EP2A40F1020C9ES von Altera und EP2A40F1020C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2A40F1020C9ES - APEX II FPGA 1.5M Gates 38400 Cells 366MHz | Altera
EP2A40F1020C9ES ObsoleteSpezifikationsvergleich
| Parameter | EP2A40F1020C9ES | EP2A40F1020C8N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $98,00 | $0,00 |
| Family | APEX II | — |
| System Gates | 1.5 M | — |
| Logic Cells / Elements | 38,400 | — |
| Maximum Internal Clock Frequency | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| Gehäuse | 1020-pin FC-FBGA | — |
| Package Type | Flip-Chip Fine-Pitch Ball Grid Array | FC-FBGA, BGA-1020 |
| Montageart | Surface Mount | Surface Mount |
| Embedded Memory | Embedded System Blocks (ESBs) - RAM/ROM | — |
| I/O Standards | LVDS and other high-speed standards (per family datasheet) | — |
| RAM Support | Synchronous and asynchronous | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature grade] | 0 °C to 85 °C |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Product Type | — | Field-Programmable Gate Array (FPGA) |
| Device Family | — | APEX II |
| Logic Technology | — | CMOS |
| Logic Gates | — | 1.5 million |
| Logic Cells | — | 38,400 |
| Nominal Supply Voltage | — | 1.5 V |
| Supply Voltage Range | — | 1.425 V to 1.575 V |
| User I/Os | — | 735 |
| Package Terminal Count | — | 1,020 pins |
| Package Body Size | — | 33 mm x 33 mm |
| Ball Pitch | — | 1 mm |
| Reported Operating Frequency | — | 376 MHz |
| Alternative Reported Frequency | — | 562 MHz |
| Reported Propagation Delay | — | 1.78 ns |
| Alternative Reported Propagation Delay | — | 1.55 ns |
| Fabrication Process | — | 0.15 µm |
| Maximum Reported Metal Layers | — | 8 layers |
| Terminal Form | — | Ball |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |