EP2A40F1020I8 vs EP2A40F1020C8N Vergleich
Detaillierter Direktvergleich von EP2A40F1020I8 von Intel und EP2A40F1020C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F1020I8 | EP2A40F1020C8N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $175,00 | $0,00 |
| Family | APEX II | — |
| Logic Elements | 2,560 (40,000 max with embedded array blocks) | — |
| Typical Gates | 38,400 | — |
| System Gates | 655,360 | — |
| User I/O Pins | 735 | — |
| Gehäuse | 1020-ball FineLine BGA (FBGA) | — |
| Process Technology | 0.18 micron CMOS | — |
| Embedded RAM Bits | 409,600 (via EABs) | — |
| Betriebstemperatur | -40C to +85C (Industrial) | 0 °C to 85 °C |
| Supply Voltage (Core) | [DATA_NEEDED: core voltage] | — |
| Supply Voltage (I/O) | [DATA_NEEDED: I/O voltage] | — |
| I/O Banks | 8 | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel, Synchronous | — |
| In-System Programmability | Yes | — |
| RoHS-Status | Depends on lot - check manufacturer declaration | unknown |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Product Type | — | Field-Programmable Gate Array (FPGA) |
| Device Family | — | APEX II |
| Logic Technology | — | CMOS |
| Logic Gates | — | 1.5 million |
| Logic Cells | — | 38,400 |
| Nominal Supply Voltage | — | 1.5 V |
| Supply Voltage Range | — | 1.425 V to 1.575 V |
| User I/Os | — | 735 |
| Package Terminal Count | — | 1,020 pins |
| Package Type | — | FC-FBGA, BGA-1020 |
| Package Body Size | — | 33 mm x 33 mm |
| Ball Pitch | — | 1 mm |
| Reported Operating Frequency | — | 376 MHz |
| Alternative Reported Frequency | — | 562 MHz |
| Reported Propagation Delay | — | 1.78 ns |
| Alternative Reported Propagation Delay | — | 1.55 ns |
| Fabrication Process | — | 0.15 µm |
| Maximum Reported Metal Layers | — | 8 layers |
| Terminal Form | — | Ball |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |