EP2A40F33C-9 vs EP2A40F33C-8 Vergleich
Detaillierter Direktvergleich von EP2A40F33C-9 von Intel und EP2A40F33C-8 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F33C-9 | EP2A40F33C-8 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $78,00 | $0,00 |
| Family | APEX II | APEX II |
| Maximum System Gates | 1,600,000 | — |
| Embedded RAM | 65 Kbytes (approximately 540 Kbits depending on configuration) | [DATA_NEEDED: embedded RAM bits] |
| Gehäuse | 672-ball FineLine BGA (F33), 1.27 mm pitch | FBGA-672 (F33) |
| Speed Grade | -9 | -8 (slowest tier) |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +85C (Commercial, 'C' suffix) |
| Process Technology | 0.15 micrometer CMOS | — |
| PLLs | 4 | — |
| LVDS Channels | 16 high-speed LVDS channels | — |
| Logic Elements | [DATA_NEEDED: exact LE count] | 40,000 |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| Multi-Core Architecture | MegaLAB structure with embedded memory and CAM | — |
| Configuration Method | JTAG, serial PROM, parallel flash | — |
| MSL-Level | 3 | — |
| Peak Reflow Temperature | 220 C | 220 C |
| RoHS-Status | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS compliance status] |
| Core Voltage | [DATA_NEEDED: nominal core voltage] | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Maximum Gates | — | [DATA_NEEDED: maximum gate count] |
| Pin-Anzahl | — | 672 |
| Substrate Size | — | 33 mm |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Family Prefix | — | EP2A (APEX II series) |
| Device Class | — | FPGA / Programmable Logic Device |