EP2A40F672C8N vs EP2A40F672C8 Vergleich
Detaillierter Direktvergleich von EP2A40F672C8N von Intel und EP2A40F672C8 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672C8N | EP2A40F672C8 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $122,00 | $68,00 |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Logic Family | CMOS | CMOS |
| System Gates | 1.5 M | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Operating Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| Technology Node | 0.15 µm | — |
| Process Feature | All-layer copper, up to 8 metal layers | — |
| Nominal Supply Voltage (VCCINT) | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 492 | 492 pins |
| Number of Pins / Balls | 672 | — |
| Package Type | FC-FBGA (FineLine BGA) | FineLine BGA, 27 x 27 mm, 1.0 mm pitch |
| Package Dimensions | 27 x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| LVDS Data Rate | 1 Gbps | — |
| Embedded PLLs | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Operating Temperature (Commercial) | 0 °C to 85 °C | — |
| Speed Grade | C8 | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Typical Logic Elements (LEs) | — | 40,000 |
| Embedded Memory | — | Up to 1.5 Mbits |
| Anzahl der Pins | — | 672 |
| Process Technology | — | 0.15-micron all-layer copper, up to 8 metal layers |
| Propagation Delay (speed grade C8) | — | 1.55 ns |
| Betriebstemperatur | — | 0 C to 85 C (commercial) |
| Phase-Locked Loops (PLLs) | — | 4 |
| LVDS Signaling Support | — | Up to 1 Gbps |
| Multipliers | — | Embedded multiplier blocks |
| I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS |
| Montageart | — | Surface Mount (BGA) |