EP2A40F672C8N vs EP2A40F672C8 比較
詳細な並列比較: EP2A40F672C8N メーカー: Intel および EP2A40F672C8 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A40F672C8N | EP2A40F672C8 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $122.00 | $68.00 |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Logic Family | CMOS | CMOS |
| System Gates | 1.5 M | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Operating Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| Technology Node | 0.15 µm | — |
| Process Feature | All-layer copper, up to 8 metal layers | — |
| Nominal Supply Voltage (VCCINT) | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 492 | 492 pins |
| Number of Pins / Balls | 672 | — |
| Package Type | FC-FBGA (FineLine BGA) | FineLine BGA, 27 x 27 mm, 1.0 mm pitch |
| Package Dimensions | 27 x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| LVDS Data Rate | 1 Gbps | — |
| Embedded PLLs | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Operating Temperature (Commercial) | 0 °C to 85 °C | — |
| Speed Grade | C8 | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Typical Logic Elements (LEs) | — | 40,000 |
| Embedded Memory | — | Up to 1.5 Mbits |
| ピン数 | — | 672 |
| Process Technology | — | 0.15-micron all-layer copper, up to 8 metal layers |
| Propagation Delay (speed grade C8) | — | 1.55 ns |
| 動作温度 | — | 0 C to 85 C (commercial) |
| Phase-Locked Loops (PLLs) | — | 4 |
| LVDS Signaling Support | — | Up to 1 Gbps |
| Multipliers | — | Embedded multiplier blocks |
| I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS |
| 実装タイプ | — | Surface Mount (BGA) |