EP2A40F672C9ES vs EP2A40F672C8 Vergleich
Detaillierter Direktvergleich von EP2A40F672C9ES von Altera und EP2A40F672C8 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672C9ES | EP2A40F672C8 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,00 | $68,00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| System Gates | 1,500,000 | — |
| Maximum User I/O | 492 | — |
| Operating Frequency (max) | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15-micron all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | — |
| Gehäuse | 672-pin FC-FBGA | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Speed Grade | -9 | — |
| Configuration Modes | PS, PPS, PPA, JTAG, FPP | — |
| Embedded Memory (ESB) | Yes (RAM/ROM/CAM) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS-Status | unknown | — |
| Logic Family | — | CMOS |
| Typical Logic Elements (LEs) | — | 40,000 |
| Embedded Memory | — | Up to 1.5 Mbits |
| User I/Os | — | 492 pins |
| Anzahl der Pins | — | 672 |
| Package Type | — | FineLine BGA, 27 x 27 mm, 1.0 mm pitch |
| Propagation Delay (speed grade C8) | — | 1.55 ns |
| Betriebstemperatur | — | 0 C to 85 C (commercial) |
| Phase-Locked Loops (PLLs) | — | 4 |
| LVDS Signaling Support | — | Up to 1 Gbps |
| Multipliers | — | Embedded multiplier blocks |