EP2A70F1020 vs EP2A40F1020C7 Vergleich

Detaillierter Direktvergleich von EP2A70F1020 von Altera und EP2A40F1020C7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A70F1020 EP2A40F1020C7
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $118,50 $138,00
Family APEX II APEX II
Logic Elements / Cells 67200 38,400
Gehäuse 1020-ball FBGA (FineLine BGA) 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
User I/O Pins 735 —
Core Voltage 1.5 V 1.5 V
Configuration Interface JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) —
SRAM-based Configuration Yes (volatile - requires external configuration memory) —
Betriebstemperatur -40C to +85C (commercial/industrial) —
Montageart Surface Mount Surface Mount
RoHS-Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
I/O Standards Supported LVTTL, LVCMOS, PCI, LVDS, SSTL, GTL+ (per APEX II family spec) —
Embedded System Blocks (ESB) Yes (RAM and arithmetic functions) —
Process Technology [DATA_NEEDED: process node] 0.15 um CMOS, all-layer copper (up to 8 metal layers)
Embedded Multipliers / DSP Blocks Not in original APEX II (no hard DSP blocks; implemented in ESB logic) —
Part Status / Lifecycle Obsolete - superseded by Altera Stratix and Cyclone families —
System Gates — 1.5 M
Macro Cells — 2,560
User I/Os — 735
Embedded Memory Bits — 655,360 bits
Maximum Internal Frequency — 562 MHz
High-Speed Interface Support — 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport
Operating Temperature Grade — Industrial / per part suffix (C7)
Lead-Free — [DATA_NEEDED: lead-free status]

Datenblätter & Ressourcen

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