EP2A70F1020 vs EP2A40F1020C7 对比

详细并排对比 EP2A70F1020 出自 Altera 和 EP2A40F1020C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A70F1020 EP2A40F1020C7
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $118.50 $138.00
Family APEX II APEX II
Logic Elements / Cells 67200 38,400
封装 1020-ball FBGA (FineLine BGA) 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
User I/O Pins 735 —
Core Voltage 1.5 V 1.5 V
Configuration Interface JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) —
SRAM-based Configuration Yes (volatile - requires external configuration memory) —
工作温度 -40C to +85C (commercial/industrial) —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
I/O Standards Supported LVTTL, LVCMOS, PCI, LVDS, SSTL, GTL+ (per APEX II family spec) —
Embedded System Blocks (ESB) Yes (RAM and arithmetic functions) —
Process Technology [DATA_NEEDED: process node] 0.15 um CMOS, all-layer copper (up to 8 metal layers)
Embedded Multipliers / DSP Blocks Not in original APEX II (no hard DSP blocks; implemented in ESB logic) —
Part Status / Lifecycle Obsolete - superseded by Altera Stratix and Cyclone families —
System Gates — 1.5 M
Macro Cells — 2,560
User I/Os — 735
Embedded Memory Bits — 655,360 bits
Maximum Internal Frequency — 562 MHz
High-Speed Interface Support — 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport
Operating Temperature Grade — Industrial / per part suffix (C7)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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