EP2AGX125EF35I5N vs EP2AGX125EF35C4G Vergleich
Detaillierter Direktvergleich von EP2AGX125EF35I5N von Intel und EP2AGX125EF35C4G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2AGX125EF35I5N - Arria II GX FPGA 118K LE, 6x 3.125G Transceivers | Intel
EP2AGX125EF35I5N ✓ AktivIntel
EP2AGX125EF35C4G - Arria II GX FPGA, 118K LEs, 1152-FCBGA | Intel
EP2AGX125EF35C4G ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2AGX125EF35I5N | EP2AGX125EF35C4G |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.390,00 | $1.290,00 |
| Family | Arria II GX | Arria II GX |
| Device Logic Elements | 118,143 | — |
| Combinational Logic Blocks (CLBs) | 124,100 | — |
| Logic Array Blocks (LABs) | 4,964 | — |
| User I/Os | 452 | — |
| Embedded Memory | 8.4 Mbit (M9K + MLAB) | — |
| DSP Blocks (18x18 Multipliers) | 252 | — |
| Transceivers | 6 (up to 3.125 Gbps) | — |
| PLLs | 4 | — |
| Process Technology | 40 nm CMOS | 40 nm |
| Core Supply Voltage | 0.9 V | — |
| Speed Grade | I5 (industrial, fastest) | C4 |
| Betriebstemperatur | -40C to +100C (industrial) | 0C to +85C (Commercial) |
| Gehäuse | 1152-ball FC-FBGA, 35 x 35 mm | 1152-ball FC-FBGA (Flip-Chip) |
| Montageart | Surface Mount (flip-chip BGA) | Surface Mount |
| Lead-Free / RoHS | Lead-Free per MS-034 | — |
| PCI Express Hard IP | Gen1 x1/x4 endpoint | Gen1/Gen2 x1/x4/x8 |
| Configuration Schemes | AS, PS, JTAG, FPP | — |
| Logic Elements | — | 118,143 |
| Embedded Memory Bits | — | 8,315,904 |
| Memory Blocks (M9K) | — | [DATA_NEEDED: M9K count] |
| Hardware Multipliers (18x18) | — | 452 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceiver Channels | — | 12 |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Core Voltage | — | 0.9 V |
| User I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Configuration Method | — | SRAM-based, PS/FPP/JTAG |
| RoHS-Status | — | Compliant |
| Lead-Free | — | Yes |