EP2AGX125EF35I5N vs EP2AGX125EF35C4G Comparaison
Comparaison détaillée côte à côte de EP2AGX125EF35I5N par Intel et EP2AGX125EF35C4G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2AGX125EF35I5N - Arria II GX FPGA 118K LE, 6x 3.125G Transceivers | Intel
EP2AGX125EF35I5N ✓ ActifIntel
EP2AGX125EF35C4G - Arria II GX FPGA, 118K LEs, 1152-FCBGA | Intel
EP2AGX125EF35C4G ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2AGX125EF35I5N | EP2AGX125EF35C4G |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 390,00 | $1 290,00 |
| Family | Arria II GX | Arria II GX |
| Device Logic Elements | 118,143 | — |
| Combinational Logic Blocks (CLBs) | 124,100 | — |
| Logic Array Blocks (LABs) | 4,964 | — |
| User I/Os | 452 | — |
| Embedded Memory | 8.4 Mbit (M9K + MLAB) | — |
| DSP Blocks (18x18 Multipliers) | 252 | — |
| Transceivers | 6 (up to 3.125 Gbps) | — |
| PLLs | 4 | — |
| Process Technology | 40 nm CMOS | 40 nm |
| Core Supply Voltage | 0.9 V | — |
| Speed Grade | I5 (industrial, fastest) | C4 |
| Température de fonctionnement | -40C to +100C (industrial) | 0C to +85C (Commercial) |
| Boîtier | 1152-ball FC-FBGA, 35 x 35 mm | 1152-ball FC-FBGA (Flip-Chip) |
| Type de montage | Surface Mount (flip-chip BGA) | Surface Mount |
| Lead-Free / RoHS | Lead-Free per MS-034 | — |
| PCI Express Hard IP | Gen1 x1/x4 endpoint | Gen1/Gen2 x1/x4/x8 |
| Configuration Schemes | AS, PS, JTAG, FPP | — |
| Logic Elements | — | 118,143 |
| Embedded Memory Bits | — | 8,315,904 |
| Memory Blocks (M9K) | — | [DATA_NEEDED: M9K count] |
| Hardware Multipliers (18x18) | — | 452 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceiver Channels | — | 12 |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Core Voltage | — | 0.9 V |
| User I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Configuration Method | — | SRAM-based, PS/FPP/JTAG |
| Statut RoHS | — | Compliant |
| Lead-Free | — | Yes |