EP2AGZ300FF35C4G vs EP2AGZ300FF35C4N Vergleich
Detaillierter Direktvergleich von EP2AGZ300FF35C4G von Intel und EP2AGZ300FF35C4N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2AGZ300FF35C4G | EP2AGZ300FF35C4N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2.240,00 | $1.350,00 |
| Family | Arria II GZ | — |
| Logic Elements | 300,000 | 298,000 |
| Adaptive Logic Modules (ALMs) | 119,000 | — |
| Embedded Memory | 16,624 Kbit (M9K + M144K) | — |
| Embedded 18x18 Multipliers | 736 | — |
| User I/O Pins | 554 | — |
| Transceivers | 12 channels | Multi-gigabit transceivers integrated |
| Max Transceiver Data Rate | 6.375 Gbps (C4 speed grade) | — |
| Gehäuse | 1152-ball FineLine BGA (FBGA-1152), 35x35 mm | — |
| Betriebstemperatur | 0°C to +85°C (commercial C4 grade) | — |
| Speed Grade | 4 | — |
| Process Technology | 40 nm TSMC | 40 nm |
| Core Voltage | 0.85 V to 1.1 V | 0.9 V |
| PLLs | 8 (up to 4 per quadrant) | [DATA_NEEDED: PLL count] |
| Global Clock Networks | 16 | — |
| PCIe Hard IP | PCIe Gen2 x4 | — |
| Hard Memory Controller | DDR3 up to 800 MHz | — |
| Configuration | Passive Serial, Fast Passive Parallel, JTAG | — |
| RoHS-Status | Compliant | Compliant (per Besenchips / DigiKey listing) |
| MSL-Level | 3 (168 hours) | — |
| Series | — | Arria II GZ |
| Logic Array Blocks (LABs) | — | 11,920 |
| Embedded Memory (bits) | — | 18,854,912 (~17.9 Mbit) |
| User I/O Count | — | 554 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Package Type | — | 1152-BBGA, FCBGA (flip-chip) |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | HBGA |
| Operating Temperature Grade | — | Commercial (C4 = 0C to +85C) |
| Configuration Memory | — | SRAM-based (volatile, requires boot device) |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks] |
| Lead-Free Status | — | Lead free (per Besenchips listing) |
| Montageart | — | Surface Mount |
| Maximum Operating Frequency | — | 500 MHz |