EP2S130F1508C5RB vs EP2S130F1508C4N Vergleich
Detaillierter Direktvergleich von EP2S130F1508C5RB von Intel und EP2S130F1508C4N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S130F1508C5RB | EP2S130F1508C4N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2.050,00 | $4.435,83 |
| Family | Stratix II | — |
| Logic Elements | 132,600 | — |
| Logic Array Blocks (LABs) | 6,727 | 6,627 |
| User I/Os | 1,126 | — |
| Embedded Memory | 6,747 Kbits (TriMatrix: MRAM/M4K/M512) | — |
| Embedded 18x18 Multipliers | 252 (504 9x9 equivalent) | — |
| Gehäuse | 1508-ball FBGA (F1508), 40x40 mm, 1.5 mm pitch | 1,508-ball FBGA |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V (typical) | — |
| Speed Grade | 5 (C5, commercial) | C4 (commercial) |
| Betriebstemperatur | 0C to +85C (commercial, junction) | 0C to +85C (commercial) |
| Montageart | Surface Mount (FBGA) | Surface Mount |
| MSL-Level | 3 (per JEDEC J-STD-020) | — |
| RoHS-Status | Compliant | Compliant (N suffix) |
| Lead-Free | Yes | — |
| Lifecycle | Not Recommended for New Designs (NRND) | — |
| Series | — | Stratix II |
| User I/O Pins | — | 1,126 |
| Package Code | — | BGA |
| Package Shape | — | SQUARE |
| Number of Terminals | — | 1,508 |
| Form of Terminal | — | BALL |
| Configuration | — | SRAM, field-programmable |
| Logic Architecture | — | Adaptive Logic Module (ALM) |
| Lead Free | — | Yes |