EP2S130F1508C5RB vs EP2S130F1508C4N 对比
详细并排对比 EP2S130F1508C5RB 出自 Intel 和 EP2S130F1508C4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S130F1508C5RB | EP2S130F1508C4N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2,050.00 | $4,435.83 |
| Family | Stratix II | — |
| Logic Elements | 132,600 | — |
| Logic Array Blocks (LABs) | 6,727 | 6,627 |
| User I/Os | 1,126 | — |
| Embedded Memory | 6,747 Kbits (TriMatrix: MRAM/M4K/M512) | — |
| Embedded 18x18 Multipliers | 252 (504 9x9 equivalent) | — |
| 封装 | 1508-ball FBGA (F1508), 40x40 mm, 1.5 mm pitch | 1,508-ball FBGA |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V (typical) | — |
| Speed Grade | 5 (C5, commercial) | C4 (commercial) |
| 工作温度 | 0C to +85C (commercial, junction) | 0C to +85C (commercial) |
| 安装类型 | Surface Mount (FBGA) | Surface Mount |
| MSL 等级 | 3 (per JEDEC J-STD-020) | — |
| RoHS 状态 | Compliant | Compliant (N suffix) |
| Lead-Free | Yes | — |
| Lifecycle | Not Recommended for New Designs (NRND) | — |
| Series | — | Stratix II |
| User I/O Pins | — | 1,126 |
| Package Code | — | BGA |
| Package Shape | — | SQUARE |
| Number of Terminals | — | 1,508 |
| Form of Terminal | — | BALL |
| Configuration | — | SRAM, field-programmable |
| Logic Architecture | — | Adaptive Logic Module (ALM) |
| Lead Free | — | Yes |