EP2S60F484C5 vs EP2S60F484C3N Vergleich
Detaillierter Direktvergleich von EP2S60F484C5 von Altera und EP2S60F484C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S60F484C5 | EP2S60F484C3N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $491,55 | $1.245,75 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60440 | 60,440 |
| Configurable Logic Blocks (CLBs) | 24176 | — |
| Logic Array Blocks (LABs) | 3022 | — |
| Embedded Memory (RAM bits) | 2,544,192 | — |
| Maximum User I/O | 334 | — |
| Gehäuse | 484-pin FC-FBGA (FBGA) | 484-BGA (F484), 1.0 mm pitch |
| Package Size | 23 x 23 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS, 1.2 V core |
| Core Voltage (VCCINT) | 1.2 V | — |
| Speed Grade | C5 (Commercial) | -3 (fastest commercial) |
| Maximum Internal Frequency | 609.76 MHz | — |
| Betriebstemperatur | Commercial (0C to +85C) | — |
| Montageart | Surface Mount (BGA) | — |
| MSL-Level | 3 (168 hours) | 3 (per JEDEC J-STD-020) |
| RoHS-Status | Compliant | Compliant |
| Adaptive LUTs (ALUTs) | — | 48,352 |
| Embedded Memory (TriMatrix) | — | 2,544 Kbits (M4K + M512 + M-RAM) |
| Embedded DSP Blocks | — | 12 (48 GMACs at 450 MHz) |
| Maximum User I/O Pins | — | 334 |
| Operating Temperature (Commercial) | — | 0C to +85C (TJ) |
| Supply Voltage VCCINT | — | 1.2 V nominal |
| Configuration Modes | — | FPP, AS, PS, JTAG |
| Lead-Free | — | Yes |