EP2S60F484C5 vs EP2S60F484C3N Comparación
Comparación detallada lado a lado de EP2S60F484C5 por Altera y EP2S60F484C3N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S60F484C5 | EP2S60F484C3N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $491,55 | $1.245,75 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60440 | 60,440 |
| Configurable Logic Blocks (CLBs) | 24176 | — |
| Logic Array Blocks (LABs) | 3022 | — |
| Embedded Memory (RAM bits) | 2,544,192 | — |
| Maximum User I/O | 334 | — |
| Encapsulado | 484-pin FC-FBGA (FBGA) | 484-BGA (F484), 1.0 mm pitch |
| Package Size | 23 x 23 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS, 1.2 V core |
| Core Voltage (VCCINT) | 1.2 V | — |
| Speed Grade | C5 (Commercial) | -3 (fastest commercial) |
| Maximum Internal Frequency | 609.76 MHz | — |
| Temperatura de funcionamiento | Commercial (0C to +85C) | — |
| Tipo de montaje | Surface Mount (BGA) | — |
| Nivel MSL | 3 (168 hours) | 3 (per JEDEC J-STD-020) |
| Estado RoHS | Compliant | Compliant |
| Adaptive LUTs (ALUTs) | — | 48,352 |
| Embedded Memory (TriMatrix) | — | 2,544 Kbits (M4K + M512 + M-RAM) |
| Embedded DSP Blocks | — | 12 (48 GMACs at 450 MHz) |
| Maximum User I/O Pins | — | 334 |
| Operating Temperature (Commercial) | — | 0C to +85C (TJ) |
| Supply Voltage VCCINT | — | 1.2 V nominal |
| Configuration Modes | — | FPP, AS, PS, JTAG |
| Lead-Free | — | Yes |