EP2S60F672C3 vs EP2S60F672C5N Vergleich
Detaillierter Direktvergleich von EP2S60F672C3 von Altera und EP2S60F672C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S60F672C3 | EP2S60F672C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.033,14 | $170,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Total RAM Bits | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| User I/Os | 492 | — |
| PLLs | 4 | — |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Voltage | 1.2 V | — |
| Speed Grade | C3 | C5 (commercial) |
| Gehäuse | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch | 672-ball FC-FBGA |
| Montageart | Surface Mount | Surface Mount |
| Configuration Modes | PS, PPS, PPA, FPP, JTAG | — |
| Betriebstemperatur | 0C to +85C (commercial) | — |
| MSL-Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Non-compliant (contains lead, per Altera/Intel EOL notice) |
| Logic Elements (LEs) | — | 60440 |
| Logic Array Blocks (LABs) | — | 3022 |
| Embedded Memory (bits) | — | 2544192 |
| Maximum User I/Os | — | 492 |
| Core Voltage (VCCINT) | — | 1.2 V |
| Maximum Internal Frequency | — | 609.76 MHz |
| Temperature Grade | — | Commercial |
| Configuration Memory | — | SRAM-based (volatile, requires external configuration device) |