EP2S60F672C3 vs EP2S60F672C5N 对比
详细并排对比 EP2S60F672C3 出自 Altera 和 EP2S60F672C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S60F672C3 | EP2S60F672C5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,033.14 | $170.00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Total RAM Bits | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| User I/Os | 492 | — |
| PLLs | 4 | — |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Voltage | 1.2 V | — |
| Speed Grade | C3 | C5 (commercial) |
| 封装 | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch | 672-ball FC-FBGA |
| 安装类型 | Surface Mount | Surface Mount |
| Configuration Modes | PS, PPS, PPA, FPP, JTAG | — |
| 工作温度 | 0C to +85C (commercial) | — |
| MSL 等级 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | Non-compliant (contains lead, per Altera/Intel EOL notice) |
| Logic Elements (LEs) | — | 60440 |
| Logic Array Blocks (LABs) | — | 3022 |
| Embedded Memory (bits) | — | 2544192 |
| Maximum User I/Os | — | 492 |
| Core Voltage (VCCINT) | — | 1.2 V |
| Maximum Internal Frequency | — | 609.76 MHz |
| Temperature Grade | — | Commercial |
| Configuration Memory | — | SRAM-based (volatile, requires external configuration device) |