EP2S60F672C4N vs EP2S60F672C4 Vergleich
Detaillierter Direktvergleich von EP2S60F672C4N von Intel und EP2S60F672C4 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S60F672C4N | EP2S60F672C4 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $325,00 | $1.080,00 |
| Family | Stratix II | Stratix II |
| Process Technology | 90 nm | 90 nm |
| Logic Elements (LE) | 60,440 | 60440 |
| Adaptive Logic Modules (ALM) | 24,176 | — |
| Embedded Memory (bits) | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: DSP block count per Stratix II variant] |
| Maximum User I/O | 492 | — |
| Core Voltage | 1.2 V | 1.2 V (typical) |
| Maximum Fabric Clock | 711.24 MHz | — |
| Gehäuse | 672-pin FC-FBGA | 672-BBGA, FCBGA |
| Package Type | FineLine Ball-Grid Array | — |
| Speed Grade | C4 (commercial) | C4 |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | — |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 3 | [DATA_NEEDED: not in provided data] |
| Lead-Free / RoHS | Yes (lead-free finish) | — |
| Embedded Memory Bits | — | 2544192 |
| Logic Array Blocks (LAB) | — | 3022 |
| User I/Os | — | 492 |
| RoHS-Status | — | [DATA_NEEDED: not confirmed in provided data] |
| Lead-Free | — | [DATA_NEEDED: not confirmed in provided data] |