EP2S60F672C4N vs EP2S60F672C4 Comparación
Comparación detallada lado a lado de EP2S60F672C4N por Intel y EP2S60F672C4 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S60F672C4N | EP2S60F672C4 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $325,00 | $1.080,00 |
| Family | Stratix II | Stratix II |
| Process Technology | 90 nm | 90 nm |
| Logic Elements (LE) | 60,440 | 60440 |
| Adaptive Logic Modules (ALM) | 24,176 | — |
| Embedded Memory (bits) | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: DSP block count per Stratix II variant] |
| Maximum User I/O | 492 | — |
| Core Voltage | 1.2 V | 1.2 V (typical) |
| Maximum Fabric Clock | 711.24 MHz | — |
| Encapsulado | 672-pin FC-FBGA | 672-BBGA, FCBGA |
| Package Type | FineLine Ball-Grid Array | — |
| Speed Grade | C4 (commercial) | C4 |
| Temperatura de funcionamiento | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | 3 | [DATA_NEEDED: not in provided data] |
| Lead-Free / RoHS | Yes (lead-free finish) | — |
| Embedded Memory Bits | — | 2544192 |
| Logic Array Blocks (LAB) | — | 3022 |
| User I/Os | — | 492 |
| Estado RoHS | — | [DATA_NEEDED: not confirmed in provided data] |
| Lead-Free | — | [DATA_NEEDED: not confirmed in provided data] |