EP2SGX60CF780C7 vs EP2SGX60CF780C5 Vergleich

Detaillierter Direktvergleich von EP2SGX60CF780C7 von Altera und EP2SGX60CF780C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2SGX60CF780C7 EP2SGX60CF780C5
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $215,00 $162,00
Family Stratix II GX —
Logic Elements 60,440 60,440
Adaptive Logic Modules (ALMs) [DATA_NEEDED: ALM count] —
Embedded Memory Bits 2,544,192 bits 2,544,192 bits
DSP Blocks 24 (18x18 multipliers) Yes (TriMatrix embedded multiplier blocks)
Maximum User I/O 364 —
Transceiver Channels 12 —
Transceiver Data Rate 600 Mbps to 6.375 Gbps —
Core Voltage 1.2 V 1.2 V
Process Node 90 nm —
Speed Grade C7 C5 (commercial)
Gehäuse 780-ball FCBGA 780-ball FC-FBGA (29x29 mm, 1 mm pitch)
Ball Pitch 1.0 mm —
Betriebstemperatur 0C to +85C (commercial) —
Configuration Scheme Enhanced Configuration (EPC) —
RoHS-Status [DATA_NEEDED: RoHS compliance] Compliant
Device Family — Stratix II GX
Logic Array Blocks (LABs) — 3,022
Maximum User I/Os — 364
Anzahl der Pins — 780
Maximum Internal Frequency — 717 MHz
Propagation Delay — [DATA_NEEDED: propagation delay in ns]
Process Technology — 90 nm CMOS
Temperature Grade — Commercial (0C to +85C)
Transceivers — Up to 20 multi-gigabit transceivers
PLLs — 4 enhanced PLLs + 8 fast PLLs
Configuration Schemes — Passive Serial, Fast Passive Parallel, JTAG
Memory Interfaces — DDR/DDR2 SDRAM controllers with source-synchronous PHY
Montageart — Surface Mount
Lead-Free — Yes
MSL-Level — [DATA_NEEDED: MSL rating]

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern