EP3C16U484C8 vs EP3C16F484C7N Vergleich

Detaillierter Direktvergleich von EP3C16U484C8 von Altera und EP3C16F484C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP3C16U484C8 EP3C16F484C7N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Device Type Field Programmable Gate Array (FPGA) —
FPGA Family Cyclone III —
Logic Cells 15,408 —
Logic Blocks 516,096 —
I/O Pins 346 —
Gehäuse 484-FBGA 484-ball FBGA
Package Type Other, LEAD FREE, MS-034 —
Montageart Surface Mount —
Betriebstemperatur -40°C to +125°C 0C to +85C (commercial)
Core Supply Voltage [DATA_NEEDED: core supply voltage] —
I/O Supply Voltage [DATA_NEEDED: I/O supply voltage range] —
Memory Blocks [DATA_NEEDED: embedded memory block count] —
PLLs [DATA_NEEDED: PLL count] 4
Maximale Taktfrequenz [DATA_NEEDED: maximum clock frequency] —
Configuration Interface [DATA_NEEDED: supported configuration interfaces] —
RoHS-Status [DATA_NEEDED: RoHS status] Compliant
REACH Status [DATA_NEEDED: REACH status] —
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification status] —
Lead-Free Status LEAD FREE —
Device Family — Cyclone III
Logic Elements — 15,408
Embedded Memory — 504 Kbits (M9K blocks)
Embedded Multipliers — 56 (18x18)
User I/O Pins — 346
Process Technology — 65 nm TSMC low-power
Core Voltage — 1.2 V (1.15 V to 1.25 V)
Speed Grade — -7
Maximum Internal Frequency — 437.5 MHz
I/O Standards Supported — LVDS, LVCMOS, LVTTL, SSTL, HSTL
Configuration Method — JTAG (IEEE 1149.1), EPCS serial flash, Active Serial

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern