EP3SE110F1152C3 vs EP3SE110F1152C3N Vergleich
Detaillierter Direktvergleich von EP3SE110F1152C3 von Altera und EP3SE110F1152C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel
EP3SE110F1152C3N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP3SE110F1152C3 | EP3SE110F1152C3N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.200,00 | $1.560,00 |
| Family | Stratix III E | Stratix III E |
| Logic Elements | 107,500 | — |
| Logic Array Blocks (LABs) | 4,300 | 4,300 |
| Adaptive Logic Modules (ALMs) | 43,040 | — |
| Total Block Memory Bits | 8,936,448 | — |
| User I/Os | 744 | 744 |
| Internal Operating Frequency (max) | 800 MHz | — |
| Core Supply Voltage | 0.9 V | 1.1 V nominal |
| Betriebstemperatur | 0 C to 85 C | 0 °C to 85 °C (commercial) |
| Gehäuse | 1152-BBGA, FCBGA | — |
| Montageart | Surface Mount (Flip-Chip BGA) | Surface Mount |
| RoHS-Status | Compliant | — |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Process Node | 40 nm | — |
| Speed Grade | C3 (commercial, slower speed grade) | C3 |
| Series | — | Stratix III |
| Logic Elements (LE) | — | 107,500 |
| Total RAM Bits | — | 8,936,448 |
| Operating Frequency (max) | — | 500 MHz |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply range] |
| Process Technology | — | 65 nm TSMC |
| Package Type | — | FC-FBGA-1152 (flip-chip BGA) |
| Montagestil | — | SMD/SMT (Tray) |
| DSP Blocks | — | Yes (embedded multipliers) |
| Speichertyp | — | M9K and M144K block RAM |
| External Memory Support | — | DDR/DDR2/DDR3 with read/write leveling |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | Yes (per Altera/Intel datasheet family convention) |