EP3SE260H780I3N vs EP3SE260H780C3N Vergleich
Detaillierter Direktvergleich von EP3SE260H780I3N von Intel und EP3SE260H780C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SE260H780I3N - Stratix III E FPGA 255K LE 780-FCBGA | Intel
EP3SE260H780I3N ⚠ Letzte BestellmöglichkeitIntel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N ✓ AktivSpezifikationsvergleich
| Parameter | EP3SE260H780I3N | EP3SE260H780C3N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.295,00 | $1.325,00 |
| Family | Stratix III E | — |
| Logic Elements (LE) | 255,000 | 255,000 |
| Logic Array Blocks (LABs) | 10,200 | — |
| Embedded Memory (bits) | 16,672,768 | 16,672,768 |
| User I/Os | 488 | 488 |
| Operating Frequency (max) | 500 MHz | — |
| Process Technology | 65 nm CMOS | 40 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.1 V | — |
| Anzahl der Pins | 780 | — |
| Gehäuse | 780-FBGA (HBGA, FCBGA) | 780-BBGA, FCBGA (H780) |
| Package Code | BGA780 | — |
| Montageart | Surface Mount (FCBGA) | Surface Mount |
| Temperature Grade | Industrial (-40C to +100C) | — |
| Speed Grade | 3 (mid) | — |
| RoHS-Status | Compliant | Compliant (lead-free 'N' suffix) |
| Lead-Free / Halogen-Free | Lead-Free (per datasheet family) | — |
| Programmable Logic Type | SRAM-based FPGA | — |
| Series | — | Stratix® III E |
| Number of LABs/CLBs | — | 10,200 |
| Number of Pins / Balls | — | 780 |
| Betriebstemperatur | — | 0 °C to +85 °C (C grade, commercial) |
| Maximum Core Frequency | — | [DATA_NEEDED: maximum core frequency MHz] |
| Supply Voltage (VCCINT) | — | [DATA_NEEDED: VCCINT nominal V] |
| Transceivers | — | [DATA_NEEDED: number of embedded transceivers and max data rate] |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks and precision] |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Configuration Method | — | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel |
| Design Toolchain | — | Altera Quartus II (legacy); Intel Quartus Prime |