EP3SE260H780I3N vs EP3SE260H780C3N Comparaison
Comparaison détaillée côte à côte de EP3SE260H780I3N par Intel et EP3SE260H780C3N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SE260H780I3N - Stratix III E FPGA 255K LE 780-FCBGA | Intel
EP3SE260H780I3N ⚠ Dernier achatIntel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N ✓ ActifComparaison des spécifications
| Paramètre | EP3SE260H780I3N | EP3SE260H780C3N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 295,00 | $1 325,00 |
| Family | Stratix III E | — |
| Logic Elements (LE) | 255,000 | 255,000 |
| Logic Array Blocks (LABs) | 10,200 | — |
| Embedded Memory (bits) | 16,672,768 | 16,672,768 |
| User I/Os | 488 | 488 |
| Operating Frequency (max) | 500 MHz | — |
| Process Technology | 65 nm CMOS | 40 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.1 V | — |
| Nombre de broches | 780 | — |
| Boîtier | 780-FBGA (HBGA, FCBGA) | 780-BBGA, FCBGA (H780) |
| Package Code | BGA780 | — |
| Type de montage | Surface Mount (FCBGA) | Surface Mount |
| Temperature Grade | Industrial (-40C to +100C) | — |
| Speed Grade | 3 (mid) | — |
| Statut RoHS | Compliant | Compliant (lead-free 'N' suffix) |
| Lead-Free / Halogen-Free | Lead-Free (per datasheet family) | — |
| Programmable Logic Type | SRAM-based FPGA | — |
| Series | — | Stratix® III E |
| Number of LABs/CLBs | — | 10,200 |
| Number of Pins / Balls | — | 780 |
| Température de fonctionnement | — | 0 °C to +85 °C (C grade, commercial) |
| Maximum Core Frequency | — | [DATA_NEEDED: maximum core frequency MHz] |
| Supply Voltage (VCCINT) | — | [DATA_NEEDED: VCCINT nominal V] |
| Transceivers | — | [DATA_NEEDED: number of embedded transceivers and max data rate] |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks and precision] |
| Niveau de sensibilité à l'humidité (MSL) | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Configuration Method | — | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel |
| Design Toolchain | — | Altera Quartus II (legacy); Intel Quartus Prime |