EP3SE50F484I4LG vs EP3SE50F484I4L Vergleich
Detaillierter Direktvergleich von EP3SE50F484I4LG von Intel und EP3SE50F484I4L von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SE50F484I4LG - 47.5K LE Stratix III E FPGA, 484-FCBGA | Intel
EP3SE50F484I4LG ⚠ Letzte BestellmöglichkeitIntel
EP3SE50F484I4L - Stratix III E FPGA, 47.5K LE, 484-FBGA | Intel
EP3SE50F484I4L ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP3SE50F484I4LG | EP3SE50F484I4L |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.340,00 | $1.290,00 |
| Series | Stratix III E | — |
| Family | Stratix III (Enhanced) | Stratix III E |
| Logic Elements (LE) | 47,500 | 47,500 |
| Adaptive Logic Modules (ALMs) | 19,000 | [DATA_NEEDED: ALM count] |
| LABs/CLBs | 1,900 | — |
| Total Embedded Memory | 5,760,000 bits (5.49 Mbit / 5.76 Mbit per source) | — |
| Number of DSP Blocks | 104 (18x18 multipliers) | — |
| Number of PLLs | 8 | — |
| User I/O Count | 296 | — |
| Core Supply Voltage (Vccint) | 0.86 V to 1.15 V (1.1 V nominal) | — |
| Betriebstemperaturbereich | -40C to +100C (Industrial, TJ) | Industrial (I): -40C to +100C junction |
| Montageart | Surface Mount (SMD/SMT) | Surface Mount (BGA) |
| Gehäuse | 484-ball FBGA / FCBGA | 484-ball FCBGA (FBGA-484) |
| Packaging | Tray | — |
| Process Technology | 40 nm CMOS | — |
| Configuration Interface | Passive Serial / Fast Passive Parallel / JTAG | — |
| Bitstream Encryption | 256-bit AES | — |
| RoHS-Status | Compliant | Compliant |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Memory | — | 5,760 Kbit (5.625 Mbit) |
| Embedded Multipliers (18x18) | — | 384 |
| Maximum User I/O | — | 296 |
| Maximum Core Clock | — | 717 MHz (per third-party listing) |
| Speed Grade | — | 4 (slowest) |
| Process Node | — | 40 nm CMOS |
| Versorgungsspannung | — | Multiple rails: core 0.9V, I/O 1.2V-3.3V (per Stratix III handbook) |
| Configuration Method | — | Quartus II / EPCS serial / parallel |
| Lead-Free (Pb-free) | — | Yes (L suffix) |
| MSL-Level | — | MSL3 (per JEDEC J-STD-020, typical for FBGA-484) |