EP3SL50F484I4 vs EP3SL50F484I4LG Vergleich

Detaillierter Direktvergleich von EP3SL50F484I4 von Intel und EP3SL50F484I4LG von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP3SL50F484I4 EP3SL50F484I4LG
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $558,00 $945,00
Device Family Stratix III L —
Logic Elements (LE) 47,500 —
Logic Array Blocks (LABs) 1,900 —
Embedded Memory Bits 2,184,192 bits —
Maximum User I/O 296 —
Process Technology 65 nm CMOS —
Internal Frequency 800 MHz (max, per digchip datasheet summary) —
Core Supply Voltage 1.1 V —
Gehäuse 484-ball FC-FBGA (FCBGA, 1.0 mm pitch) 484-Ball FCBGA (FBGA)
Betriebstemperatur -40C to +100C (industrial) -40C to +100C (Industrial)
Grade Suffix I4 = Industrial, speed grade 4 —
Configuration Modes JTAG, Passive Serial, FPP, PPA —
MultiTrack Interconnect Yes —
TriMatrix Embedded Memory MLAB, M9K, M144K blocks —
Montageart Surface Mount (BGA) Surface Mount
MSL-Level 3 (168 hours) —
RoHS-Status Compliant Compliant
Lead-Free Yes Yes
Family — Stratix III L
Series — EP3SL50
Logic Elements — 47,500
Embedded Memory — 2,184,192 bits (273 KB)
User I/Os — 296
Speed Grade — I4 (fast)
Versorgungsspannung — 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail)
Process Node — 40 nm
Total I/O Banks — [DATA_NEEDED: I/O bank count]
DSP Blocks — [DATA_NEEDED: DSP block count]
Transceivers — [DATA_NEEDED: transceiver channel count]
Configuration Memory — SRAM-based
Configuration Interface — JTAG / Passive Serial / Fast Passive Parallel

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