EP3SL70F484I3 vs EP3SL70F484I4G Vergleich
Detaillierter Direktvergleich von EP3SL70F484I3 von Intel und EP3SL70F484I4G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SL70F484I3 - Stratix III L FPGA, 67.5K LE, 484-FBGA | Intel
EP3SL70F484I3 ⚠ Letzte BestellmöglichkeitIntel
EP3SL70F484I4G - Stratix III L FPGA, 67.5K LE, 484-FBGA | Intel
EP3SL70F484I4G ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP3SL70F484I3 | EP3SL70F484I4G |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.013,66 | $901,31 |
| Family | Stratix III L | — |
| Logic Elements | 67,500 | — |
| Adaptive Logic Modules (ALMs) | 33,000 | — |
| Logic Array Blocks (LABs) | 2,700 | — |
| Total Embedded Memory | 2,699,264 bits (337 KB) | — |
| M9K Memory Blocks | 288 | — |
| M144K Memory Blocks | 12 | — |
| DSP Blocks (18x18 multipliers) | 384 | — |
| User I/O Pins | 296 | — |
| Transceivers | Up to 12 (3.75 Gbps) [DATA_NEEDED: confirm exact count for F484 package] | None on this device variant |
| PLLs | 8 (4 enhanced PLLs + 4 fast PLLs) | — |
| Process Node | TSMC 40 nm | — |
| Speed Grade | -3 (mid-tier) | — |
| Betriebstemperatur | -40C to +100C (industrial) | -40C to +100C (Industrial) |
| Gehäuse | 484-ball Flip-Chip BGA (FBGA-484), 1.0 mm pitch | 484-ball FC-FBGA |
| Configuration Modes | FPP, AS, PS, JTAG, AES encryption | — |
| Design Software | Quartus II (legacy) | — |
| RoHS-Status | Compliant | Compliant |
| Series | — | Stratix® III L |
| Number of Logic Elements (LE) | — | 67,500 |
| Adaptive Logic Modules (ALM) | — | 27,000 ALM |
| Embedded Memory | — | 2.57 Mbit |
| Number of I/O | — | 296 |
| Number of CLB / LAB | — | 2,700 LAB-equivalent |
| Supply Voltage (Core) | — | 1.1 V |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| PLL Count | — | [DATA_NEEDED: PLL count] |
| Process Technology | — | 65 nm CMOS |
| Montageart | — | Surface Mount |
| Maximale Taktfrequenz | — | 450 MHz |