EP610DC-35 vs EP610DI-30N Vergleich
Detaillierter Direktvergleich von EP610DC-35 von Altera und EP610DI-30N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610DC-35 | EP610DI-30N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,40 | $17,80 |
| Device Type | CPLD - Classic EPLD | — |
| Family | Altera Classic EP610 | Altera Classic EP610 |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 35 ns | 30 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V ±5% |
| Process Technology | CMOS | CMOS |
| Program/erase Method | UV-erasable (windowed CERDIP) | — |
| Gehäuse | 24-pin CDIP (windowed CERDIP) 0.300 inch | CDIP-24 (Ceramic DIP, windowed) |
| Montageart | Through-Hole (DIP) | Through-hole (DIP) |
| Betriebstemperatur | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] | -40°C to +85°C (industrial) |
| Manufacturer | Originally Altera; today supplied via Rochester Electronics (authorized) | — |
| RoHS-Status | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] | [DATA_NEEDED: RoHS status] |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Maximum Frequency | — | 33.3 MHz (system); 100 MHz (pipelined) |
| Pin-Anzahl | — | 24 |
| Programming Method | — | UV-erasable (windowed ceramic) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |