EP610DI-25 vs EP610DC-15 Vergleich
Detaillierter Direktvergleich von EP610DI-25 von Intel und EP610DC-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610DI-25 | EP610DC-15 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $7,95 |
| Part Family | Classic EPLD | — |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 25 ns | 15 ns (speed grade -15) |
| Maximum Pipelined Clock Frequency | 100 MHz (max fCNT, per family datasheet) | — |
| I/O Pins | 16 (bidirectional) | — |
| Dedicated Inputs | 4 | 20 |
| Total User I/O | 20 | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS |
| Supply Voltage (VCC) | 5 V nominal | 4.75 V to 5.25 V |
| Package Type | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 | — |
| Pin-Anzahl | 24 | — |
| Montageart | Through-Hole (DIP) | Through-Hole |
| Betriebstemperatur | Industrial (per "I" suffix) | 0C to 70C (commercial) |
| Speed Grade Suffix | 25 = 25 ns | — |
| Compliance | RoHS status unknown (legacy 1990s part) | — |
| Product Family | — | Classic EPLD (EP610) |
| Architecture | — | UV-erasable CMOS PAL-type |
| Logic Expanders | — | 4 |
| Bidirectional I/O Pins | — | 16 |
| Total Product Terms | — | 160 |
| Maximum Internal Clock Frequency | — | 71.4 MHz |
| Gehäuse | — | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Programming Method | — | JEDEC fuse map, UV erasure |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |