EP610DI-35 vs EP610DC-35 Vergleich
Detaillierter Direktvergleich von EP610DI-35 von Intel und EP610DC-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoleteSpezifikationsvergleich
| Parameter | EP610DI-35 | EP610DC-35 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $18,40 |
| Family | Altera Classic EPLD | Altera Classic EP610 |
| Series | EP610 | — |
| Logic Cells / Macrocells | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Product Terms | 160 | — |
| I/O Pins | 16 bidirectional | — |
| Total Inputs | 20 (including 4 dedicated inputs) | — |
| Propagation Delay (tpd) | 35 ns | — |
| Maximum Toggle Frequency | 28.6 MHz | — |
| Internal Pipelined Data Rate | Up to 100 MHz | — |
| Versorgungsspannung | 5 V | — |
| Technology | CMOS, UV-erasable | — |
| Gehäuse | 24-pin CDIP (Ceramic DIP) | 24-pin CDIP (windowed CERDIP) 0.300 inch |
| Montageart | Through-hole | Through-Hole (DIP) |
| Betriebstemperatur | [DATA_NEEDED: industrial/commercial grade range] | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] |
| RoHS-Status | [DATA_NEEDED: not confirmed in supplied web data] | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] |
| Device Type | — | CPLD - Classic EPLD |
| Macrocells | — | 16 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Process Technology | — | CMOS |
| Program/erase Method | — | UV-erasable (windowed CERDIP) |
| Manufacturer | — | Originally Altera; today supplied via Rochester Electronics (authorized) |