EP610LC-25 vs EP610ILC-25 Vergleich
Detaillierter Direktvergleich von EP610LC-25 von Intel und EP610ILC-25 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610LC-25 | EP610ILC-25 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,20 | $9,85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Classic EPLD (EP610 series) |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Versorgungsspannung | 5 V ±5% | — |
| Technology | CMOS | — |
| Programmability | UV-erasable (windowed package) | — |
| Gehäuse | PLCC-28 | 28-pin PLCC (J-lead) |
| Betriebstemperatur | 0C to +70C (commercial) | — |
| Montageart | Surface Mount | Surface Mount |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| RoHS-Status | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Device Type | — | EEPLD (Electrically Erasable PLD) |
| Usable Gates | — | 300 |
| Product Terms | — | 160 |
| Maximum Operating Frequency (fMAX) | — | 40 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 25 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Nominal Supply Voltage | — | 5 V |
| Total Inputs | — | 20 |
| Dedicated Inputs | — | 4 |
| Bidirectional I/O Pins | — | 16 |
| Betriebstemperaturbereich | — | 0 C to +70 C (commercial) |
| Process Technology | — | CMOS, electrically erasable |
| Programming Method | — | In-system, electrically erasable |