EP610LC-25 vs EP610ILC-25 Comparación
Comparación detallada lado a lado de EP610LC-25 por Intel y EP610ILC-25 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP610LC-25 | EP610ILC-25 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,20 | $9,85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Classic EPLD (EP610 series) |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Tensión de alimentación | 5 V ±5% | — |
| Technology | CMOS | — |
| Programmability | UV-erasable (windowed package) | — |
| Encapsulado | PLCC-28 | 28-pin PLCC (J-lead) |
| Temperatura de funcionamiento | 0C to +70C (commercial) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| Estado RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Device Type | — | EEPLD (Electrically Erasable PLD) |
| Usable Gates | — | 300 |
| Product Terms | — | 160 |
| Maximum Operating Frequency (fMAX) | — | 40 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 25 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Nominal Supply Voltage | — | 5 V |
| Total Inputs | — | 20 |
| Dedicated Inputs | — | 4 |
| Bidirectional I/O Pins | — | 16 |
| Rango de temperatura de funcionamiento | — | 0 C to +70 C (commercial) |
| Process Technology | — | CMOS, electrically erasable |
| Programming Method | — | In-system, electrically erasable |