EP610PC-15 vs EP610PC-20T Vergleich
Detaillierter Direktvergleich von EP610PC-15 von Altera und EP610PC-20T von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610PC-15 | EP610PC-20T |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,50 | $7,20 |
| Family | Classic EPLD | Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 300 gates | 300 gates |
| Macrocells | 16 | — |
| Logic Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Maximum Counter Frequency | 100 MHz (per family datasheet) | — |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Technology | CMOS | — |
| Architecture | PAL-type, sum-of-products AND/OR array | — |
| TTL Emulation | 100% TTL compatible | — |
| Gehäuse | PDIP-24 (plastic DIP, 24-pin) | 24-pin PDIP (Plastic DIP) |
| Pin-Anzahl | 24 pins | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| Montageart | Through-Hole (DIP) | Through-Hole |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Development Tool | Altera MAX+PLUS II | MAX+PLUS II |
| Logic Test Circuitry | On-board for AC/DC verification | — |
| Logic Elements / Macrocells | — | 16 macrocells |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Number of Dedicated Inputs | — | 16 |
| Number of I/O Pins | — | 16 |
| Programmable Output Enable | — | Yes (per macrocell) |
| Programming Technology | — | UV-erasable EPROM, CMOS |