EP610PC-15 vs EP610PC-20T Comparación
Comparación detallada lado a lado de EP610PC-15 por Altera y EP610PC-20T por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP610PC-15 | EP610PC-20T |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,50 | $7,20 |
| Family | Classic EPLD | Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 300 gates | 300 gates |
| Macrocells | 16 | — |
| Logic Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Maximum Counter Frequency | 100 MHz (per family datasheet) | — |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Technology | CMOS | — |
| Architecture | PAL-type, sum-of-products AND/OR array | — |
| TTL Emulation | 100% TTL compatible | — |
| Encapsulado | PDIP-24 (plastic DIP, 24-pin) | 24-pin PDIP (Plastic DIP) |
| Recuento de pines | 24 pins | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| Tipo de montaje | Through-Hole (DIP) | Through-Hole |
| Estado RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Development Tool | Altera MAX+PLUS II | MAX+PLUS II |
| Logic Test Circuitry | On-board for AC/DC verification | — |
| Logic Elements / Macrocells | — | 16 macrocells |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Number of Dedicated Inputs | — | 16 |
| Number of I/O Pins | — | 16 |
| Programmable Output Enable | — | Yes (per macrocell) |
| Programming Technology | — | UV-erasable EPROM, CMOS |