EP610PI-25 vs EP610LC-25 Vergleich
Detaillierter Direktvergleich von EP610PI-25 von Rochester Electronics und EP610LC-25 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 Obsolete
Spezifikationsvergleich
| Parameter | EP610PI-25 | EP610LC-25 |
|---|---|---|
| Marke | Rochester Electronics | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $20,50 | $6,20 |
| Product Type | Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Series | Classic EP610 | — |
| Macrocells | 16 | 16 |
| Usable Gates | ~300 gates | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Maximum Internal Frequency (fCNT) | [DATA_NEEDED: fCNT] | — |
| Number of Dedicated Inputs | 4 | — |
| Number of Bidirectional I/O Pins | 16 | — |
| Gehäuse | 24-pin DIP (PI) ceramic through-hole | PLCC-28 |
| Betriebstemperaturbereich | Industrial (I suffix): -40C to +85C | — |
| Supply Voltage (VCC) | 5 V nominal | — |
| Process Technology | CMOS, UV-erasable | — |
| Programmable Flip-Flop Modes | D, T, JK, SR (per macrocell) | — |
| Global Clock Pins | 1 | — |
| Montageart | Through-Hole (DIP) | Surface Mount |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS] | — |
| Original Manufacturer | Altera (now Intel PSG; legacy stock from Rochester Electronics) | — |
| Family | — | Classic EPLD |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Toggle Frequency | — | 100 MHz |
| Pipelined Data Rate | — | Up to 100 MHz |
| Versorgungsspannung | — | 5 V ±5% |
| Technology | — | CMOS |
| Programmability | — | UV-erasable (windowed package) |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| I/O Pins | — | [DATA_NEEDED: exact I/O count] |
| RoHS-Status | — | [DATA_NEEDED] |