EP610PI-25 vs EP610LC-25 比較
詳細な並列比較: EP610PI-25 メーカー: Rochester Electronics および EP610LC-25 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 Obsolete
仕様比較
| パラメータ | EP610PI-25 | EP610LC-25 |
|---|---|---|
| ブランド | Rochester Electronics | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $20.50 | $6.20 |
| Product Type | Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Series | Classic EP610 | — |
| Macrocells | 16 | 16 |
| Usable Gates | ~300 gates | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Maximum Internal Frequency (fCNT) | [DATA_NEEDED: fCNT] | — |
| Number of Dedicated Inputs | 4 | — |
| Number of Bidirectional I/O Pins | 16 | — |
| パッケージ | 24-pin DIP (PI) ceramic through-hole | PLCC-28 |
| 動作温度範囲 | Industrial (I suffix): -40C to +85C | — |
| Supply Voltage (VCC) | 5 V nominal | — |
| Process Technology | CMOS, UV-erasable | — |
| Programmable Flip-Flop Modes | D, T, JK, SR (per macrocell) | — |
| Global Clock Pins | 1 | — |
| 実装タイプ | Through-Hole (DIP) | Surface Mount |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS] | — |
| Original Manufacturer | Altera (now Intel PSG; legacy stock from Rochester Electronics) | — |
| Family | — | Classic EPLD |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Toggle Frequency | — | 100 MHz |
| Pipelined Data Rate | — | Up to 100 MHz |
| 電源電圧 | — | 5 V ±5% |
| Technology | — | CMOS |
| Programmability | — | UV-erasable (windowed package) |
| 動作温度 | — | 0C to +70C (commercial) |
| I/O Pins | — | [DATA_NEEDED: exact I/O count] |
| RoHS ステータス | — | [DATA_NEEDED] |