EP910IDC-15 vs EP910ILC-12 Vergleich

Detaillierter Direktvergleich von EP910IDC-15 von Altera und EP910ILC-12 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP910IDC-15 EP910ILC-12
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $9,95 $12,40
Manufacturer Altera (now Intel PSG) —
Family Classic EPLD Altera EP910 Classic EPLD
Equivalent Gates 450 —
Macrocells 24 —
Flip-Flops 48 —
Pin-to-Pin Delay (tPD) 15 ns —
Maximum Frequency (fCNT) 66.6 MHz —
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V
Gehäuse 40-pin CDIP (Ceramic DIP, through-hole) 28-PLCC (J-Lead, 11.5 x 11.5 mm)
Terminal Count 40 —
Terminal Form Through-Hole —
Temperature Grade Commercial (0C to +70C) —
Programmable Security Bit Yes —
On-board Test Circuitry Yes —
Logic Type UV Erasable EPROM-based —
I/O Pins 24 —
Dedicated Inputs 10 —
Programming Technology EPROM (UV-erasable) —
RoHS-Status non_compliant (ceramic DIP contains lead) [DATA_NEEDED: RoHS status]
Product Type — Classic EPLD (Erasable Programmable Logic Device)
Number of Macrocells — 24
Usable Gates — 450 (typical)
Propagation Delay (tPD) — 12 ns (max)
Nominal Supply — 5 V
Memory Technology — UV-erasable CMOS EPROM
Montageart — Surface Mount
Betriebstemperatur — -40 °C to +85 °C (industrial grade, 'I' suffix)
Configuration Storage — Non-volatile EPROM (instant-on)
Programming Method — Altera programming algorithm (serial/parallel master-slave)
MSL-Level — [DATA_NEEDED: MSL level]
Anzahl der Pins — 28
Feedback Paths — 16 dedicated

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