EP910ILC-25 vs EP910ILC-15N Vergleich
Detaillierter Direktvergleich von EP910ILC-25 von Intel und EP910ILC-15N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP910ILC-15N - 450 Gate 24-Macrocell Classic CPLD, 15ns, 5V, 44-PLCC | Altera
EP910ILC-15N ObsoleteSpezifikationsvergleich
| Parameter | EP910ILC-25 | EP910ILC-15N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $9,85 |
| Family | EP910 Classic EPLD | Classic |
| Macrocells | 24 | — |
| User I/O Pins | 36 | 36 |
| Propagation Delay (tPD) | 25 ns | — |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Gehäuse | 44-pin JLCC (windowed ceramic) | PLCC-44 (J-lead, surface mount) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40C to +85C (industrial) | 0 C to +70 C (commercial) |
| Versorgungsspannung | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| RoHS-Status | non_compliant (ceramic windowed package) | Compliant |
| Lebenszyklusstatus | Obsolete - last time buy was late 1990s | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Gates | — | 450 |
| Macro Cells | — | 24 |
| Maximum Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 66.6 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Dedicated Input Pins | — | 16 |
| Process Technology | — | CMOS EPROM (one-time programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming | — | EPROM / JTAG (Classic EP-series) |