EP910LC-32 vs EP910LC-25 Vergleich

Detaillierter Direktvergleich von EP910LC-32 von Altera und EP910LC-25 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP910LC-32 EP910LC-25
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $9,85 $2,20
Device Family Altera Classic EPLD —
Number of Macrocells 24 —
Number of Usable Gates 900 gates (typical) —
Number of Dedicated Inputs 10 —
Number of I/O Pins 20 —
Gehäuse PLCC-32 28-pin PLCC (LC suffix)
Speed Grade -32 —
Maximum Toggle Frequency (fMAX) [DATA_NEEDED: fMAX value in MHz for -32 grade] —
Pin-to-Pin Propagation Delay (tPD) [DATA_NEEDED: tPD in ns for -32 grade] —
Supply Voltage (VCC) 5 V —
Logic Family Low-power CMOS (LC suffix) —
Programming Method UV-erasable or one-time programmable (OTP for LC windowless variant) —
Betriebstemperaturbereich [DATA_NEEDED: commercial or industrial grade] —
I/O Standard TTL-compatible —
Montageart Surface Mount (PLCC socket or direct solder) Surface Mount
RoHS-Status unknown [DATA_NEEDED: RoHS status]
MSL-Level unknown —
Family — Altera Classic EPLD
Macrocells — 24
Logic Gates — [DATA_NEEDED: logic gate count]
Propagation Delay (tPD) — 25 ns
Dedicated Inputs — 16
Technology — CMOS (EPROM-based)
Operating Voltage — [DATA_NEEDED: VCC range]
Betriebstemperatur — 0C to +70C (commercial)
Programmable — Yes (EPROM, UV-erasable on windowed variants)
I/O Pins — [DATA_NEEDED: I/O count]
Lead-Free — [DATA_NEEDED: lead-free status]
Maximum Frequency — [DATA_NEEDED: fMAX]

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