EP910LC-32 vs EP910LC-25 对比

详细并排对比 EP910LC-32 出自 Altera 和 EP910LC-25 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LC-32 EP910LC-25
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $2.20
Device Family Altera Classic EPLD —
Number of Macrocells 24 —
Number of Usable Gates 900 gates (typical) —
Number of Dedicated Inputs 10 —
Number of I/O Pins 20 —
封装 PLCC-32 28-pin PLCC (LC suffix)
Speed Grade -32 —
Maximum Toggle Frequency (fMAX) [DATA_NEEDED: fMAX value in MHz for -32 grade] —
Pin-to-Pin Propagation Delay (tPD) [DATA_NEEDED: tPD in ns for -32 grade] —
Supply Voltage (VCC) 5 V —
Logic Family Low-power CMOS (LC suffix) —
Programming Method UV-erasable or one-time programmable (OTP for LC windowless variant) —
工作温度范围 [DATA_NEEDED: commercial or industrial grade] —
I/O Standard TTL-compatible —
安装类型 Surface Mount (PLCC socket or direct solder) Surface Mount
RoHS 状态 unknown [DATA_NEEDED: RoHS status]
MSL 等级 unknown —
Family — Altera Classic EPLD
Macrocells — 24
Logic Gates — [DATA_NEEDED: logic gate count]
Propagation Delay (tPD) — 25 ns
Dedicated Inputs — 16
Technology — CMOS (EPROM-based)
Operating Voltage — [DATA_NEEDED: VCC range]
工作温度 — 0C to +70C (commercial)
Programmable — Yes (EPROM, UV-erasable on windowed variants)
I/O Pins — [DATA_NEEDED: I/O count]
Lead-Free — [DATA_NEEDED: lead-free status]
Maximum Frequency — [DATA_NEEDED: fMAX]

数据手册与资源

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