EP910LC-40T vs EP910LC-25 Vergleich
Detaillierter Direktvergleich von EP910LC-40T von Altera und EP910LC-25 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LC-40T | EP910LC-25 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,40 | $2,20 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Equivalent Gates | 450 gates | — |
| Macrocells | 24 | 24 |
| Logic Array Blocks | 4 Logic Expandable AND-OR arrays | — |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 40 ns | 25 ns |
| Maximum Frequency (fMAX) | 25 MHz | — |
| Versorgungsspannung | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable | CMOS (EPROM-based) |
| Gehäuse | PLCC-44 (PQCC44) | 28-pin PLCC (LC suffix) |
| Betriebstemperatur | -40 C to +85 C (commercial, per -LC suffix family) | 0C to +70C (commercial) |
| Programming | Altera MAX+PLUS II / APLUS tools | — |
| Erase/Reprogram Cycles | 100 (windowed UV-erase family) | — |
| Pin-Anzahl | 44 | — |
| Packaging Option | Tape and Reel (T suffix) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status - not stated in web data] | [DATA_NEEDED: RoHS status] |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Dedicated Inputs | — | 16 |
| Montageart | — | Surface Mount |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | — | [DATA_NEEDED: I/O count] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |