EP910LC-40T vs EP910LC-25 Comparación
Comparación detallada lado a lado de EP910LC-40T por Altera y EP910LC-25 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-40T | EP910LC-25 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $2,20 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Equivalent Gates | 450 gates | — |
| Macrocells | 24 | 24 |
| Logic Array Blocks | 4 Logic Expandable AND-OR arrays | — |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 40 ns | 25 ns |
| Maximum Frequency (fMAX) | 25 MHz | — |
| Tensión de alimentación | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable | CMOS (EPROM-based) |
| Encapsulado | PLCC-44 (PQCC44) | 28-pin PLCC (LC suffix) |
| Temperatura de funcionamiento | -40 C to +85 C (commercial, per -LC suffix family) | 0C to +70C (commercial) |
| Programming | Altera MAX+PLUS II / APLUS tools | — |
| Erase/Reprogram Cycles | 100 (windowed UV-erase family) | — |
| Recuento de pines | 44 | — |
| Packaging Option | Tape and Reel (T suffix) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status - not stated in web data] | [DATA_NEEDED: RoHS status] |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Dedicated Inputs | — | 16 |
| Tipo de montaje | — | Surface Mount |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | — | [DATA_NEEDED: I/O count] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |