EP910LI-35 vs EP910ILC-25 Vergleich
Detaillierter Direktvergleich von EP910LI-35 von Altera und EP910ILC-25 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LI-35 | EP910ILC-25 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $25,80 | $9,95 |
| Family | Altera Classic EPLD | EP910 Classic EPLD |
| Device Series | EP910 | — |
| Usable Gates | 900 | — |
| Macrocells | 24 | 24 |
| Maximum User I/O Pins | 38 | — |
| Propagation Delay (t_PD) | 35 ns | — |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | — |
| Versorgungsspannung | 5 V (4.75 V to 5.25 V) | 5 V |
| Betriebstemperatur | -40 °C to +85 °C (Industrial) | -40C to +85C (industrial) |
| Gehäuse | 44-pin PLCC (J-lead) | 44-pin JLCC (windowed ceramic) |
| Process Technology | CMOS EPROM | — |
| Programming Technology | EPROM (UV-erasable) | — |
| Erase/Program Cycles | ≥100 | — |
| Montageart | Surface Mount | Surface Mount |
| Lead Pitch | 1.27 mm | — |
| User I/O Pins | — | 36 |
| Propagation Delay (tPD) | — | 25 ns |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Technology | — | CMOS EPROM (UV-erasable) |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| RoHS-Status | — | non_compliant (ceramic windowed package) |
| Lebenszyklusstatus | — | Obsolete - last time buy was late 1990s |