EP910LI-35H vs EP910LC44-35 Vergleich
Detaillierter Direktvergleich von EP910LI-35H von Intel und EP910LC44-35 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LI-35H | EP910LC44-35 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $19,95 |
| Family | Altera Classic EPLD (EP910) | Classic EPLD (OT sub-family) |
| Logic Capacity | 900 usable gates | — |
| Macro Cells | 24 | — |
| Speed Grade (tPD) | 35 ns | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCC) | 5 V (±10%) | 5 V (single supply) |
| Technology | CMOS, UV-erasable EPROM cell | — |
| Gehäuse | 44-pin PLCC (J-lead) | 44-pin PLCC (J-leaded) |
| Betriebstemperatur | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Active Supply Current | [DATA_NEEDED: ICC] | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | unknown | — |
| Lead-Free Option (H suffix) | Yes (H suffix) | — |
| Architecture | — | PAL-type AND/OR array |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 35 ns (max) |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Total Inputs | — | 36 |
| I/O Pins | — | 24 |
| Global Clocks | — | 2 |
| Process Technology | — | CMOS |
| Programmability | — | UV-erasable (windowed ceramic) |