EP910LI-35H vs EP910LC44-35 Comparación
Comparación detallada lado a lado de EP910LI-35H por Intel y EP910LC44-35 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LI-35H | EP910LC44-35 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,85 | $19,95 |
| Family | Altera Classic EPLD (EP910) | Classic EPLD (OT sub-family) |
| Logic Capacity | 900 usable gates | — |
| Macro Cells | 24 | — |
| Speed Grade (tPD) | 35 ns | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCC) | 5 V (±10%) | 5 V (single supply) |
| Technology | CMOS, UV-erasable EPROM cell | — |
| Encapsulado | 44-pin PLCC (J-lead) | 44-pin PLCC (J-leaded) |
| Temperatura de funcionamiento | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Active Supply Current | [DATA_NEEDED: ICC] | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | unknown | — |
| Lead-Free Option (H suffix) | Yes (H suffix) | — |
| Architecture | — | PAL-type AND/OR array |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 35 ns (max) |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Total Inputs | — | 36 |
| I/O Pins | — | 24 |
| Global Clocks | — | 2 |
| Process Technology | — | CMOS |
| Programmability | — | UV-erasable (windowed ceramic) |